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CD4094BMS
December 1992
CMOS 8-Stage Shift-and-Store Bus Register
Pinout
CD4094BMS TOP VIEW
Features
* High Voltage Type (20V Rating) * 3-State Parallel Outputs for Connection to Common Bus * Separate Serial Outputs Synchronous to Both Positive and Negative Clock Edges for Cascading * Medium Speed Operation - 5MHz at 10V (typ) * Standardized Symmetrical Output Characteristics * 100% Tested for Quiescent Current at 20V * Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC * Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V * 5V, 10V and 15V Parametric Ratings * Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"
STROBE 1 DATA 2 CLOCK Q1 Q2 Q3 Q4 VSS 3 4 5 6 7 8
16 VDD 15 OUTPUT ENABLE 14 Q5 13 Q6 12 Q7 11 Q8 10 Q'S 9 QS
Functional Diagram
SERIAL OUTPUTS 10 Q'S 8-STAGE SHIFT REGISTER 9 QS
Applications
* Serial-to-Parallel Data Conversion * Remote Control Holding Register * Dual-Rank Shift, Hold, and Bus Applications
DATA CLOCK 2 3
Description
CD4094BMS is a 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the STROBE input is high. Data in the storage register appears at the outputs whenever the OUTPUT-ENABLE signal is high. Two serial outputs are available for cascading a number of CD4094BMS devices. Data is available at the QS serial output terminal on positive clock edges to allow for high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information, available at the Q'S terminal on the next negative clock edge, provides a means for cascading CD4094BMS devices when the clock rise time is slow. The CD4094BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4X H1F H6W
STROBE 1 8-BIT STORAGE REGISTER
OUTPUT ENABLE
15
3-STATE OUTPUTS
VDD = 16 VSS = 8
PARALLEL OUTPUTS Q1 - Q8 (TERMINALS 4, 5, 6, 7, 14, 13, 12, 11, RESPECTIVELY)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
File Number
3194
7-1083
Specifications CD4094BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) Tri-State Output Leakage VIL VIH VIL VIH IOZL VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VIN = VDD or GND VOUT = 0V VDD = 20V VDD = 18V Tri-State Output Leakage IOZH VIN = VDD or GND VOUT = VDD VDD = 20V VDD = 18V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3 1 2 3 1 2 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1 2 3 1 2 3 +25oC, LIMITS TEMPERATURE +25oC +125 C -55oC +25oC +125oC -55oC +25oC +125oC -55oC +125oC, +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +125oC -55oC +25oC +125oC -55oC 3.5 11 -0.4 -12 -0.4 1.5 4 0.4 12 0.4 V V V V A A A A A A -55oC
o
PARAMETER Supply Current
SYMBOL IDD
CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND
MIN -100 -1000 -100 0.53 1.4 3.5 -2.8 0.7
MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8
UNITS A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
+25oC, +125oC, -55oC 14.95
VOH > VOL < VDD/2 VDD/2
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
7-1084
Specifications CD4094BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 +25oC +125oC, -55oC LIMITS MIN o
PARAMETER Propagation Delay Clock to Serial Output QS Propagation Delay Clock to Serial Output Q'S Propagation Delay Clock to Parallel Output Propagation Delay Strobe to Parallel Output Propagation Delay Output Enable to Parallel Output Propagation Delay Output Enable to Parallel Output Transition Time
SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 TPLH3 TPHL4 TPLH4 TPHZ TPZH TPLZ TPZL TTHL TTLH FCL
CONDITIONS VDD = 5V, VIN = VDD or GND (Note 1, 2) VDD = 5V, VIN = VDD or GND (Note 1, 2) VDD = 5V, VIN = VDD or GND (Note 1, 2) VDD = 5V, VIN = VDD or GND (Note 1, 2) VDD = 5V, VIN = VDD or GND (Note 2, 3) VDD = 5V, VIN = VDD or GND (Note 2, 3) VDD = 5V, VIN = VDD or GND (Note 1, 2) VDD = 5V, VIN = VDD or GND (Note 1, 2)
MAX 600 810 460 621 840 1134 580 783 280 378 200 270 200 270 -
UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz
+25oC +125oC, -55oC
+25oC +125oC, -55oC +25oC +125 C, -55 C +25 C +125oC, -55oC +25oC +125oC, -55oC
o o
1.25 .93
+25oC +125oC, -55oC
Maximum Clock Input Frequency NOTES:
+25oC +125oC, -55oC
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. 3. CL = 50pF, RL = 1K, Input TR, TF < 20ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC 4.95 9.95 0.36 0.64 0.9 1.6 50 mV V V mA mA mA mA MIN MAX 5 150 10 300 10 600 50 UNITS A A A A A A mV
7-1085
Specifications CD4094BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Sink) SYMBOL IOL15 CONDITIONS VDD = 15V, VOUT = 1.5V NOTES 1, 2 TEMPERATURE +125oC -55 C Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55 Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2
oC o
MIN 2.4 4.2 7 2.5 3 -
MAX -0.36 -0.64 -1.1 -2.0 -0.9 -2.6 -2.4 3 250 190 220 150 390 270 290 200 120 90 100 80 100 80 125 55 35 15 5 5 200 100 83
UNITS mA mA mA mA mA mA mA mA mA mA V V ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz ns ns ns s s s ns ns ns
+125oC -55oC +125oC -55o C +125oC -55
oC
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
Input Voltage Low Input Voltage High Propagation Delay Clock to Serial Output Qs Propagation Delay Clock to Serial Output Q's Propagation Delay Clock to Parallel Output Propagation Delay Strobe to Parallel Output Propagation Delay Output Enable to Parallel Output Propagation Delay Output Enable to Parallel Output Transition Time
VIL VIH TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 TPLH3 TPHL4 TPLH4 TPHZ TPZH TPLZ TPZL TTLH TTHL FCL
VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V
1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3, 5 1, 2, 3, 5 1, 2, 3, 5 1, 2, 3 1, 2, 3 1, 2, 3
+25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC +25
oC
+25oC +25 C +25
oC o
+25oC +25
oC
+25oC +25oC +25oC +25oC +25
oC
Maximum Clock Input Frequency Minimum Data Setup Time
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
TS
VDD = 5V VDD = 10V VDD = 15V
Maximum Clock Input Rise and Fall Time
TRCL TFCL
VDD = 5V VDD = 10V VDD = 15V
Minimum Clock Pulse Width
TW
VDD = 5V VDD = 10V VDD = 15V
7-1086
Specifications CD4094BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Minimum Strobe Pulse Width SYMBOL TW CONDITIONS VDD = 5V VDD = 10V VDD = 15V Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. CL = 50pF, RL = 1K, Input TR, TF < 20ns. 5. If more than one unit is cascaded, TRCL should be made less than or equal to the sumof the transition time and the fixed propagation delay of the output of the driving stage for the estimated capacitive load. CIN Any Input NOTES 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC +25 C +25oC +25
oC o
MIN -
MAX 200 80 70 7.5
UNITS ns ns ns pF
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 25 -0.2 1 2.8 1 VOL < VDD/2 1.35 x +25oC Limit UNITS A V V V V V
ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 1.0A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) MIL-STD-883 METHOD 100% 5004 GROUP A SUBGROUPS 1, 7, 9 READ AND RECORD IDD, IOL5, IOH5A
7-1087
Specifications CD4094BMS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V OPEN 4 - 7, 9 - 14 4 - 7, 9 - 14 4 - 7, 9 - 14 GROUND 1 - 3, 8, 15 8 8 8 VDD 16 1 - 3, 15, 16 1, 15, 16 1 - 3, 15, 16 4 - 7, 9 - 14 3 2 9V -0.5V 50kHz 25kHz
7-1088
CD4094BMS
SERIAL IN
CL p D CL CL 1 Q CL CL D 2 Q CL CL D 8 Q CL CL pn TR CL CL TR TR p n TR TR TR LATCH 1 TR TR LATCH 2 TR TR LATCH 8 STAGES 3-7 p n CL Q n
*
2
SERIAL OUT 10 Q'S
CLOCK
*
3 STROBE
SERIAL OUT 9 QS
*
1 OUTPUT ENABLE
*
VDD
*
15
3-STATE 1
3STATE 2 n
3STATE 8
VSS
* ALL INPUTS
PROTECTED BY CMOS PROTECTION NETWORK
p
VDD 4 Q1
VSS 5 Q2 6 7 14 13 12 11 Q8
Q3 Q4 Q5 Q6 Q7
FIGURE 1. LOGIC DIAGRAM TRUTH TABLE OUTPUT ENABLE 0 0 1 1 1 1 = Level Change X = Don't Care NC = No Change OC = Open Circuit * At the positive clock edge information in the 7th shift register stage is transferred to the 8th register stage and the QS output PARALLEL OUTPUTS STROBE X X 0 1 1 1 DATA X X X 0 1 1 Q1 OC OC NC 0 1 NC Logic 1 = High Logic 0 = Low QN OC OC NC QN-1 QN-1 NC SERIAL OUTPUTS QS* Q7 NC Q7 Q7 Q7 NC Q'S NC Q7 NC NC NC Q7
CL
7-1089
CD4094BMS Typical Performance Characteristics
OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
30 25 20 15 10 5
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V
10V
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
5V 0 5 10 15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT TRANSFER CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5
0
0 -5 -10 -15
0
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-20 -25
-10V
-10
-15V
-30
-15V
-15
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) 300 AMBIENT TEMPERATURE (TA) = +25oC 250 SUPPLY VOLTAGE (VDD) = 5V 200
400 SUPPLY VOLTAGE (VDD) = 5V 300
150
10V
200
10V
100 15V 50
100
15V
0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 6. CLOCK-TO-SERIAL OUTPUT QS PROPAGATION DELAY vs CL
FIGURE 7. CLOCK-TO-SERIAL OUTPUT Q'S PROPAGATION DELAY vs CL
7-1090
CD4094BMS Typical Performance Characteristics
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) 600 AMBIENT TEMPERATURE (TA) = +25oC 500
(Continued)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC
400
SUPPLY VOLTAGE (VDD) = 5V
400 SUPPLY VOLTAGE (VDD) = 5V 300
300 10V 200 15V 100
200
10V
100
15V
0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 8. CLOCK-TO-PARALLEL OUTPUT PROPAGATION DELAY vs CL
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) 300 AMBIENT TEMPERATURE (TA) = +25oC 250
FIGURE 9. STROBE-TO-PARALLEL OUTPUT PROPAGATION DELAY vs CL
AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (tTHL, tTLH) (ns)
tPHL tPLH SUPPLY VOLTAGE (VDD) = 5V 10V 15V 15V
200 5V 150 10V
200 SUPPLY VOLTAGE (VDD) = 5V
150
100
100 10V 50 5V
50
0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
0 0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 10. OUTPUT ENABLE-TO-PARALLEL OUTPUT PROPAGATION DELAY vs CL
MAXIMUM CLOCK FREQUENCY (fCL MAX) (MHz)
FIGURE 11. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE
POWER DISSIPATION /PACKAGE (PD) (W) 106 AMBIENT TEMPERATURE (TA) = +25oC ALTERNATING 0 AND 1 PATTERN OUTPUT ENABLE HIGH STROBE HIGH EVERY 8 CLOCK PULSES SUPPLY VOLTAGE (VDD) = 15V 104 10V 103 5V 102 CL = 50pF CL = 15pF 10 1 10 102 103 104 105 10V
15
AMBIENT TEMPERATURE (TA) = LOAD CAPACITANCE (CL) = 50PF
+25oC
105
10
5
0
5
10 15 SUPPLY VOLTAGE (VDD) (V)
20
INPUT FREQUENCY (fI) (kHz)
FIGURE 12. TYPICAL MAXIMUM-CLOCK-FREQUENCY vs SUPPLY VOLTAGE
FIGURE 13. DYNAMIC POWER DISSIPATION vs INPUT CLOCK FREQUENCY
7-1091
CD4094BMS
CLOCK
DATA IN
STROBE OUTPUT ENABLE
INTERNAL Q1 3 OUTPUT Q1 STATE 3 - STATE
INTERNAL Q7 3 - STATE 3 OUTPUT Q7 STATE
SERIAL QS OUTPUT SERIAL Q'S OUTPUT
FIGURE 14. TIMING DIAGRAM
DIGITALLY CONTROLLED EQUIPMENT (REQUIRES CONTINUOUS DIGITAL CONTROL)
DIGITALLY CONTROLLED EQUIPMENT
DIGITALLY CONTROLLED EQUIPMENT
D
CD4094BMS STROBE CLOCK
Q'S
D
CD4094BMS STROBE CLOCK
QS
D
CD4094BMS STROBE CLOCK
CONTROL AND SYNC CIRCUITRY
DATA CLOCK FROM REMOTE CONTROL PANEL
FIGURE 15. REMOTE CONTROL HOLDING REGISTER
7-1092
CD4094BMS Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).
METALLIZATION: PASSIVATION:
Thickness: 11kA - 14kA,
AL.
10.4kA - 15.6kA, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches
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NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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Price & Availability of CD4094BMS

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